Introduction

Types

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How to measure the negative values of current and voltage

Analog to Digital Converter by its name digitalize analog signal to its equivalent digital output. An analog-to-digital converter (abbreviated ADC, A/D or A to D) is an electronic integrated circuit, which converts continuous signals to discrete digital numbers. The reverse operation is performed by a digital-to-analog converter (DAC). The digital output may be used in different coding schemes, such as binary, Gray code or two's complement binary.

PIC has inbuilt analog to digital convertor which can be configured as 8 bit or 10 bit. For our project we have configured the ADC to be 8 bit thus the resolution of ADC will be 2⁸=256 i.e it can have 256 values. The ADC has 8 input channel. Besides input channels , the ADC has to be referenced with maximum and minimum reference for ADC conversion. But the default value will be 0 to +5 voltage for many ADC.  
Thus, in order to measure the negative values, negative references voltage should be given to micro controller and it should be translated into its original value through simple calculation. 

Figure: Reference voltage generation through 5.12 Volt battery

By changing the value of resistors the reference voltages can be controlled. 

Introduction to VHDL

Overview:
Abbreviations:
VHSIC--Very High speed Integrated Circuits;
HDL-- Hardware Description Language
VHDL-- VHSIC Hardware Description Language
VHDL is the first hardware description language that was standardized by IEEE in 1987.  Is used to describe the physical behavior of the system and is general purpose parallel programming language.

There are three main sections in a VHDL program.
1. LIBRARY : contains a list of all libraries to be used in the design
2. ENTITY DECLARATION: specifies the I/O pins of the physical system
3. ARCHITECTURE: The codes that describes the physical system nature.

Library and Packages:
Keywords: library and use
      Syntax
      library library_name;
      use library_name.package_name.package_parts;
IEEE Library:
 std_logic_1164 package: defines the standard datatypes
 std_logic_arith package: provides arithmetic, conversion and
 comparison functions for the signed, unsigned, integer, std_ulogic, std_logic_unsigned,
std_logic and std_logic_vector types
std_logic_misc package: defines supplemental types, subtypes,
constants and functions for the std_logic_1164 package.

entity declaration defines the NAME of the entity and lists the
input and output ports
       Keywords: entity, is, port, end
Syntax:
entity entity_name is
port (
port_name: signal_mode signal_type;
port_name: signal_mode signal_type;
…);
end entity_name;

Signal Mode:

Mode: is one of the reserved words to indicate the signal direction:
 In – indicates that the signal is an input
 Out – indicates that the signal is an output of the entity whose
 value can only be read by other entities that use it
 buffer – indicates that the signal is an output of the entity whose
 value can be read inside the entity’s architecture
 Inout – the signal can be an input or an output (bidirectional ports)